Data transmission media often distort data signals, making it difficult for transmitted data signals to be read by a receiving device. For example, twisted pair cables have filtering properties that tend to attenuate higher frequencies. This limited bandwidth also creates interference between individual data bits, known as inter- symbol interference. Wireless signals may reflect off buildings and other surfaces resulting in a signal traveling multiple paths of different lengths. As a result, reflections may be received at a receiver at different times resulting in adjacent bits overlapping one another in a composite of the reflected signals.
An ideal received data signal would have a series of square-wave-type pulses. However, incoming transmitted signals are not perfect. Deviation from ideality can be caused by frequency-dependent attenuation of the channel over which the data is transmitted. For example, if the channel, such as a wire trace on a printed circuit board or transmission line, presents more attenuation at higher frequencies than at lower frequencies, phase distortion of the incoming digital data stream can occur.
Inter-symbol interference (ISI) causes bits in a transmitted signal to differ from an ideal signal. Each bit of incoming data is “stretched” so that its tail falls over adjacent bits and other bits in the data stream. The resultant incoming digital data stream has pulses with sloped leading and trailing edges and rounded corners. For example, the first bit adds a small amount of voltage to the second bit to produce a summed signal that is unlike either the first or the second bits.
In order to compensate for inter-symbol inference and other distortion, received data signals often must be retimed or phase shifted to align the data signals with a clock. Clock and data recovery circuits, such as phase locked loops, accept distorted data and provide a clock signal and retimed (or recovered) data as outputs.
Decision-feedback equalization (“DFE”) is a technique to compensate for changes in the received data signal due to ISI. DFE applies a selected correction signal (e.g., voltage or current) to an input bit at a summing node in order to compensate for the frequency-dependent attenuation of the channel carrying the data to the receiver. In some systems, DFE essentially reverses the channel attenuation as a function of frequency. DFE techniques store sampled input data from and provide feedback of the stored data samples back into the data stream based on the frequency response of the data channel. Linear devices, such as linear gain amplifiers, provide a selected amount of feedback. However, in a typical architecture, the addition of DFE circuitry requires additional memory to store previous data bits and may introduce a large load on the high-speed clock, or add delay to the data feedback path.
One or more embodiments may address one or more of the above issues.